1. Field of the Invention
The present invention relates to an active matrix display screen and to a process for producing said screen. It is used in the display of information using liquid crystal screens.
2. Discussion of the Background
An active matrix display screen generally comprises two plates between which is inserted an electrooptical material, such as a liquid crystal. On one of these plates there is a matrix of transparent conductive blocks, thin film transistors, a group of conductive addressing rows and a group of conductive addressing columns. Each transistor has a gate connected to a row, a source connected to a block and a drain connected to a column. There is a counterelectrode on the other plate.
Such a structure is shown in FIG. 1 and it is possible to see in simplified form a lower plate 10 carrying conductive columns 12, conductive rows 14, transistors 20 and conductive blocks 22, as well as an upper plate 24 covered with a counterelectrode 26.
In order to obtain such a structure, it is possible to use a known process, whose main stages are illustrated in FIG. 2. This process comprises the following operations:
preparation of a glass substrate 30 by physicochemical cleaning, PA1 deposition of a layer 32 of transparent conductive material, e.g. of tin and indium oxide (ITO) (part a), PA1 first photogravure, to give layer 32 the form of columns 34 and blocks 36 connected to a segment 38 (part b), PA1 deposition of a semi-conductor layer 40, an insulating layer 42 and a metal layer 44 (part c), PA1 second photogravure applied to the preceding stack for defining rows 46 overlapping segments 38 and intersecting columns 34, which defines thin film transistors (part d), PA1 general passivation by the deposition of a not shown SiO.sub.2 layer.
Such a process, with two masking levels, is described in French patent application 2 533 072.
Although this "two level" process constitutes a significant improvement compared with other processes having 4-6 photolithography levels, it suffers from the disadvantage of producing a weak point in the structure obtained. This relates to the etching of the stack constituted by semiconductor 40, insulant 42 and metal 44. Overetching of the semiconductor is almost inevitable and can give rise to the formation of caverns, which favor the retention of impurities, which causes deterioration. This overetching is indicated by the reference numeral 41 in FIG. 3, part a, which is a section along a column 34. Part b thereof shows the structure in perspective.
Another disadvantage is that the rows and columns are only separated by an approximately 100-300 nm thick sandwich. It is clear that the edge of said sandwich is the preferred point for the formation of rows-columns short-circuits, either through the presence of conductive particles bridging said edge, or through the formation of conductive paths resulting e.g. from electrostatic breakdowns.
However, if such disadvantages exist, they are not very frequently encountered because, on screens with 80,000 dots (which represents the same number of row-column intersections), there are generally less than 5 short-circuits, even in the case of basic technology. However, this still constitutes an inherent disadvantage of the "two level" prior art process and must be eliminated if it is wished to obtain screens free from defects.